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  ks86c6404/c6408/p6408 product overview 1- 1 1 product overview sam87ri product family samsung's sam87ri family of 8-bit single-chip cmos microcontrollers offers a fast and efficient cpu, a wide range of integrated peripherals, and various mask-programmable rom sizes. a dual address/data bus architecture and a large number of bit- or nibble-configurable i/o ports provide a flexible programming environment for applications with varied memory and i/o requirements. timer/counters with selectable operating modes are included to support real-time operations. many sam87ri microcontrollers have an external interface that provides access to external memory and other peripheral devices. ks86c6404/c6408/p6408 microcontroller the ks86c6404/c6408/p6408 single-chip 8-bit microcontroller is fabricated using an advanced cmos process. it is built around the powerful sam87ri cpu core. stop and idle power-down modes were implemented to reduce power consumption. to increase on-chip register space, the size of the internal register file was logically expanded. the ks86c6404 has 4 k bytes of program memory on-chip and ks86c6408 has 8 k bytes. using the sam87ri design approach, the following peripherals were integrated with the sam87ri core: ? five configurable i/o ports (32 pins) ? 20 bit-programmable pins for external interrupts ? 8-bit timer/counter with three operating modes ? low speed usb function the ks86c6404/c6408/p6408 is a versatile microcontroller that can be used in a wide range of low speed usb support general purpose applications. it is especially suitable for use as a keyboard controller and is available in a 42 -pin sdip and a 44-pin qfp package. otp the ks86c6404/c6408 microcontroller is also available in otp (one time programmable) version, KS86P6408. KS86P6408 microcontroller has an on-chip 8-kbyte one-time-programmable eprom instead of masked rom. the KS86P6408 is comparable to ks86c6404/c6408, both in function and in pin configuration.
product overview ks 86c6404/c6408/p6408 1- 2 features cpu ? sam87ri cpu core memory ? 4/8-kbyte internal program memory (rom) ? 208-byte ram instruction set ? 41 instructions ? idle and stop instructions added for power- down modes instruction execution time ? 1.0 m s at 6 mhz f osc interrupts ? 25 interrupt sources with one vector, each source has its pending bit ? one level, one vector interrupt structure oscillation circuit ? 6 mhz crystal/ceramic oscillator ? external clock source (6 mhz) general i/o ? bit programmable five i/o ports (34 pins total) ? (d+/ps2, d-/ps2 included) timer/counter ? one 8-bit basic timer for watchdog function and programmable oscillation stabilization interval generation function ? one 8-bit timer/counter with compare/overflow usb serial bus ? compatible to usb low speed (1.5 mbps) device 1.0 specification. ? 1 control endpoint and 2 data endpoint ? serial bus interface engine (sie) ? packet decoding/generation ? crc generation and checking ? nrzi encoding/decoding and bit-stuffing ? 8 bytes each receive/transmit usb buffer operating temperature range ? ? 40 c to + 85 c operating voltage range ? 4.0 v to 5.25 v package types ? 42-pin sdip ? 44-pin qfp
ks86c6404/c6408/p6408 product overview 1- 3 block diagram port 0 port 3 sam87ri cpu p0.0-p0.7/int2 4/8-kb rom p3.0 p3.1 p3.2 p3.3/clo osc 208-byte register port 4 p4.0 / int1 p4.1 / int1 p4.2 / int1 p4.3 / int1 timer 0 port 1 port 2 p2.0-p2.7 / int0 p1.0-p1.7 x in x out sam87ri bus basic timer i/o port and interrupt control usb d+/ps2 d-/ps2 3.3 v out 16 bytes usb buffer figure 1-1. block diagram
product overview ks 86c6404/c6408/p6408 1- 4 pin assignments p3.1 p3.0 int0 / p2.0 int0 / p2.1 int0 / p2.2 int0 / p2.3 int0 / p2.4 int0 / p2.5 int0 / p2.6 int0 / p2.7 v dd v ss x out x in test int1 / p4.0 int1 / p4.1 reset int1 / p4.2 int1 / p4.3 p1/7 ks86c6404 ks86c6408 42-sdip (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 p3.2 p3.3/clo d+/ps2 d-/ps2 3.3 v out nc p0.0 / int p0.1 / int p0.2 / int p0.3 / int p0.4 / int p0.5 / int p0.6 / int p0.7 / int p1.0 p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 figure 1-2. pin assignment diagram (42-pin sdip package)
ks86c6404/c6408/p6408 product overview 1- 5 p1.0 p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 p1.7 p4.3/int1 p4.2/int1 reset 3.3 v out d-/ps2 d+/ps2 p3.3/clo p3.2 p3.1 p3.0 p2.0/int0 p2.1/int0 p2.2/int0 p2.3/int0 nc nc nc p0.0/int2 p0.1/int2 p0.2/int2 p0.3/int2 p0.4 /int2 p0.5/int2 p0.6/int2 p0.7/int2 int0 / p2.4 int0 / p2.5 int0 / p2.6 int0 / p2.7 v dd v ss x out x in test p4.0/int1 p4.1/int1 34 35 36 37 38 39 40 41 42 43 44 22 21 20 19 18 17 16 15 14 13 12 ks86c6404 ks86c6408 (top view) 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 figure 1-3. pin assignment diagram (44-pin qfp package)
product overview ks 86c6404/c6408/p6408 1- 6 pin descriptions table 1-1. ks86c6404/c6408/p6408 pin descriptions pin names pin type pin description circuit number pin numbers share pins p0.0-p0.7 i/o bit-programmable i/o port for schmitt trigger input or open-drain output. port0 can be individually configured as external interrupt inputs. pull-up resistors are assignable by software. b 36-29 (30-23) int2 p1.0-p1.7 i/o bit-programmable i/o port for schmitt trigger input or open-drain output. pull-up resistors are assignable by software. b 28-21 (22-15) ? p2.0-p2.7 i/o bit-programmable i/o port for schmitt trigger input or open-drain output. port2 can be individually configured as external interrupt inputs. pull-up resistors are assignable by software. b 3-10 (41-44, 1-4) int0 p3.0-p3.3 i/o bit-programmable i/o port for schmitt trigger input, open-drain or push-pull output. p3.3 can be used to system clock output(clo) pin. c 2, 1, 42, 41 (40-37) p3.3/clo p4.0-p4.3 i/o bit-programmable i/o port for schmitt trigger input or open-drain output or push-pull output. port4 can be individually configured as external interrupt inputs. in output mode, pull-up resistors are assignable by software. but in input mode, pull-up resistors are fixed. d 16, 17, 19, 20 (10, 11, 13, 14) int1 d+/ps2 d-/ps2 i/o programmable port for usb interface or ps2 interface. ? 40-39 (36-35) ? 3.3 v out ? 3.3 v output from internal voltage regulator ? 38 (34) ? x in , x out ? system clock input and output pin (crystal/ceramic oscillator, or external clock source) ? 14, 13 (8, 7) ? int0 int1 int2 i external interrupt for bit-programmable port0, port2 and port4 pins when set to input mode. ? 3-10, 16,17, 19, 20, 29-36 (30-23, 41-44, 1-4, 10, 11, 13, 14) port2/ port4/ port0 reset i reset signal input pin. input with internal pull- up resistor. a 18 (12) ? test i test signal input pin (for factory use only; connected to v ss ) ? 15 (9) ? v dd ? power input pin ? 11 (5) ? v ss ? ground input pin ? 12, (6) ? nc ? no connection ? 37 (31,32, 33) ? note : pin numbers shown in parenthesis '( )' are for the 44-qfp package; others are for the 42-sdip package.
ks86c6404/c6408/p6408 product overview 1- 7 pin circuits table 1-2. pin circuit assignments for the ks86c6404/c6408/p6408 circuit number circuit type ks86c6404/c6408/p6408 assignments a i reset signal input b i/o ports 0, 1, and 2 c i/o port 3 d i/o port 4 v dd pull-up resistor in noise filter figure 1-4. pin circuit type a (reset) output disable in put data mux d0 d1 mode in put data in put out put d0 d1 i/o pull-up enable v ss v dd pull-up resistor output data figure 1-5. pin circuit type b (ports 0, 1 and 2)
product overview ks 86c6404/c6408/p6408 1- 8 v dd open drain output disable in put data mode in put data in put out put d0 d1 i/o output data v ss mux d0 d1 figure 1-6. pin circuit type c (port 3)
ks86c6404/c6408/p6408 product overview 1- 9 v dd open drain output disable in put data mode in put data in put out put d0 d1 i/o output data v ss pull-up enable v dd pull-up resistor mux d0 d1 figure 1-7. pin circuit type d (port 4)
product overview ks 86c6404/c6408/p6408 1- 10 application circuit x out keyboard matrix 0 1 2 3 15 0 1 2 3 7 x in v ss1 v dd 5v port 3 port 0 port 1 port 2 reset h o s t dp dm ks86c6404 ks86c6408 KS86P6408 5v port 4 d+/ps2 d-/ps2 note : port4 can use expend keyboard matrix. d+/ps2, d-/ps2 can use ps2 keyboard interface (see ps2conint, page 4-25). port 4.2, 4.3 can use ps2 mouse interface. port 3 can use led direct drive. figure 1-8. keyboard application circuit diagram
ks86c6404/c6408/p6408 electrical data 12- 1 12 electrical data overview in this section, the following ks86c6404/c6408/p6408 electrical characteristics are presented in tables and graphs: ? absolute maximum ratings ? d.c. electrical characteristics ? input/output capacitance ? a.c. electrical characteristics ? input timing for external interrupt (ports 0, 2 and 4) d+/ps2, d-/ps2 : ps2 mode only ? input timing for reset ? oscillator characteristics ? oscillation stabilization time ? clock timing measurement points at x in ? data retention supply voltage in stop mode ? stop mode release timing when initiated by a reset ? stop mode release timing when initiated by an external interrupt ? characteristic curves
electrical data ks8 6c6404/c6408/p6408 12- 2 table 12-1. absolute maximum ratings (t a = 25 c ) parameter symbol conditions rating unit supply voltage v dd ? ? 0.3 to + 6.5 v input voltage v in all input ports ? 0.3 to v dd + 0.3 v output voltage v o all output ports ? 0.3 to v dd + 0.3 v output current high i oh one i/o pin active ? 18 ma all i/o pins active ? 60 output current low i ol one i/o pin active + 30 ma total pin current for ports 3 + 100 total pin current for ports 0, 1, 2, 4 + 100 operating temperature t a ? ? 40 to + 85 c storage temperature t stg ? ? 65 to + 150 c
ks86c6404/c6408/p6408 electrical data 12- 3 table 12-2. d.c. electrical characteristics (t a = ? 40 c to + 85 c , v dd = 4.0 v to 5.25 v) parameter symbol conditions min typ max unit operating voltage v dd f osc = 6 mhz (instruction clock = 1 mhz) 4.0 5.0 5.25 v input high voltage v ih1 all input pins except v ih2 0.8 v dd ? v dd v v ih2 x in v dd ? 0.5 v dd v ih3 reset 0.5v dd input low voltage v il1 all input pins except v il2 ? ? 0.2 v dd v v il2 x in 0.4 v il2 reset 0.5v dd output high voltage v oh i oh = ? 200 a; all output ports except ports 0, 1 and 2, d+, d? v dd ? 1.0 ? ? v output low voltage v ol i ol = 1 ma all output port except d+, d? ? ? 0.4 v output low current i ol v ol = 3v port 3 only 8 15 23 ma input high leakage current i lih1 (3) v in = v dd all inputs except i lih2 except d+, d? ? ? 3 a i lih2 (3) v in = v dd x in, x out, reset ? ? 20 a input low leakage current i lil1 (3) v in = 0 v all inputs except i lil2 except d+, d? ? ? ? 3 a i lil2 (3) v in = 0 v x in, x out, reset ? ? ? 20 a
electrical data ks8 6c6404/c6408/p6408 12- 4 table 12-2. d.c. electrical characteristics (continued) (t a = ? 40 c to + 85 c , v dd = 4.0 v to 5.25 v) parameter symbol conditions min typ max unit output high leakage current i loh (1) v out = v dd all i/o pins and output pins except d+, d? ? ? 3 a output low leakage current i lol (1) v out = 0 v all i/o pins and output pins except d+, d? ? ? ? 3 a pull-up resistors r l1 v in = 0 v ports 0, 1, 2, 4.2-3, reset 25 50 100 k w r l2 v in = 0 v; p4.0-1 2.4 supply current (2) i dd1 normal operation mode 6 mhz cpu clock ? 5.5 12 ma i dd2 idle mode; 6 mhz oscillator 2.2 5 ma i dd3 stop mode 180 300 a notes : 1. except x in and x out . 2. supply current does not include current drawn through internal pull-up resistors or external output current loads. 3. when usb mode only in 4.2 v to 5.25 v, d+ and d? satisfy the usb spec 1.0.
ks86c6404/c6408/p6408 electrical data 12- 5 table 12-3. input/output capacitance (t a = ? 40 c to + 85 c , v dd = 0 v) parameter symbol conditions min typ max unit input capacitance c in f = 1 mhz; unmeasured pins are connected to v ss ? ? 10 pf output capacitance c out i/o capacitance c io table 12-4. a.c. electrical characteristics (t a = ? 40 c to + 85 c , v dd = 4.0 v to 5.25 v) parameter symbol conditions min typ max unit interrupt input high, low width t inth , t intl p0, p2 and p4 ? 200 ? ns reset input low width t rsl reset 10 ? ? m s t intl t inth 0.8 v dd 0.2 v dd figure 12-1. input timing for external interrupt (ports 0, 2, and 4) reset t rsl 0.5v dd figure 12-2. input timing for reset
electrical data ks8 6c6404/c6408/p6408 12- 6 table 12-5. oscillator characteristics (t a = ? 40 c + 85 c , v dd = 4.0 v to 5.25 v) oscillator clock circuit test condition min typ max unit main crystal main ceramic (f osc ) c2 x in x out c1 oscillation frequency ? 6.0 ? mhz external clock x in x out oscillation frequency ? 6.0 ? table 12-6. oscillation stabilization time (t a = ? 40 c + 85 c , v dd = 4.0 v to 5.25 v) oscillator test condition min typ max unit main crystal f osc = 6.0 mhz ? ? 10 ms main ceramic (oscillation stabilization occurs when v dd is equal to the minimum oscillator voltage range.) oscillator stabilization wait time t wait stop mode release time by a reset ? 2 16 / f osc ? t wait stop mode release time by an interrupt ? (note) ? note : the oscillator stabilization wait time, t wait , is determined by the setting in the basic timer control register, btcon.
ks86c6404/c6408/p6408 electrical data 12- 7 table 12-7. data retention supply voltage in stop mode (t a = ? 40 c to + 85 c ) parameter symbol conditions min typ max unit data retention supply voltage v dddr stop mode 2.0 ? 6 v data retention supply current i dddr stop mode; v dddr = 2.0 v ? ? 300 a t xl t xh v dd 0.5v 0.4v x in 1/f osc figure 12-3. clock timing measurement points at x in
electrical data ks8 6c6404/c6408/p6408 12- 8 t wait v dd reset execution of stop instruction v dddr data retention mode stop mode internal reset oper a tion idle mode (basic timer active) 0.5 v dd 0.5 v dd normal operating mode ~ ~ ~ ~ ~ ~ ~ ~ figure 12-4. stop mode release timing when initiated by a reset t wait v dd external interrupt execution of stop instruction v dddr data retention mode stop mode idle mode (basic timer active) 0.8 v dd 0.2 v dd normal operating mode ~ ~ ~ ~ ~ ~ ~ ~ figure 12-5. stop mode release timing when initiated by an external interrupt
ks86c6404/c6408/p6408 electrical data 12- 9 table 12-8. low speed usb electrical characteristics (t a = ? 40 c to + 85 c, voltage regulator output v 33out = 2.8 v to 3.5 v, typ 3,3 v) parameter symbol conditions min max unit transition time: rise time tr cl = 50 pf 75 ? ns cl = 350 pf ? 300 fall time tf cl = 50 pf 75 ? cl = 350 pf ? 300 rise/fall time matching trfm ( tr/ tf) cl = 50 pf 80 120 % output signal crossover voltage vcrs cl = 50 pf 1.3 2.0 v voltage regulator output voltage v33out with v33out to gnd 0.1 m f capacitor 2.8 3.5 v measurement points 90% 90% tr tf 1 0% d.u.t r1 s/w 2.8v test point cl r1 = 15 k w r2 = 1.5 k w cl = 50pf-350pf dm: s/w on dp: s/w off r2 1 0% figure 12-6. usb data signal rise and fall time vcrs max: 2.0 v min : 1.3 v 3.3 v 0 v dp dm figure 12-7. usb output signal crossover point voltage
electrical data ks8 6c6404/c6408/p6408 12- 10 notes
ks86c6404/c6408/p6408 mechanical data 13- 1 13 mechanical data overview the ks86c6404/c6408/p6408 is available in a 42-pin sdip package (samsung: 42-sdip-600) and a 44-pin qfp package (44 -qfp-1010b). package dimensions are shown in figures 13-1 and 13- 2. 0-15 15.24 0.25 +0.1 ? 0.05 0.51min 3.50 0.2 3.30 0.3 5.08max 39.10 0.2 39.50 max 1.00 0.1 0.50 0.1 (1.77) 1.778 14.00 3 0.2 #1 #21 #42 #22 40-sdip-600 figure 13-1. 42-pin sdip package mechanical data (42-sdip-600 )
mechanical data ks 86c6404/c6408/p6408 13- 2 note : dimensions are in millimeters. 44-qfp-1010b 13.20 0.3 #44 (1.00) #1 13.20 0.3 10.00 0.2 0.35 +0.10 - 0.05 0.10 max 0.15 +0.10 - 0.05 0 - 8 0.05 min 2.05 0.10 2.30 max 0.80 0.20 0.80 10.00 0.2 figure 13-2. 44-pin qfp package mechanical data (44-qfp-1010b)
ks86c6404/c6408/p6408 KS86P6408 otp 14- 1 14 KS86P6408 otp overview the KS86P6408 single-chip cmos microcontroller is the otp (one time programmable) version of the ks86c6404/c6408 microcontroller. it has an on-chip otp rom instead of masked rom. the eprom is accessed by serial data format. the KS86P6408 is fully compatible with the ks86c6404/c6408, both in function and in pin configuration. because of its simple programming requirements, the KS86P6408 is ideal for use as an evaluation chip for the ks86c6404/c6408. p3.1 p3.0 int0 / p2.0 int0 / p2.1 int0 / p2.2 int0 / p2.3 int0 / p2.4 int0 / p2.5 sdat /int0 / p2.6 sclk / int0 / p2.7 v dd / v dd v ss /v ss x out / x out x in /x in test /test int1 / p4.0 int1 / p4.1 reset / reset int1 / p4.2 int1 / p4.3 p1/7 KS86P6408 42-sdip (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 p3.2 p3.3/clo d+ d- 3.3 v out nc p0.0 / int2 p0.1 / int2 p0.2 / int2 p0.3 / int2 p0.4 / int2 p0.5 / int2 p0.6 / int2 p0.7 / int2 p1.0 p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 figure 14-1. KS86P6408 pin assignments (42-sdip package)
KS86P6408 otp ks86c6404/c6408/p 6408 14- 2 p1.0 p1.1 p1.2 p1.3 p1.4 p1.5 p1.6 p1.7 p4.3/int1 p4.2/int1 reset/ reset 3.3 v out d-/ps2 d+/ps2 p3.3/clo p3.2 p3.1 p3.0 p2.0/int0 p2.1/int0 p2.2/int0 p2.3/int0 nc nc nc p0.0/int2 p0.1/int2 p0.2/int2 p0.3/int2 p0.4 /int2 p0.5/int2 p0.6/int2 p0.7/int2 p2.4/int0 p2.5/int0 p2.6/int0/ sdat p2.7/int0/ sclk v dd/ v dd v ss/ v ss x out/ x out x in/ x in test/ test p4.0/int1 p4.1/int1 34 35 36 37 38 39 40 41 42 43 44 22 21 20 19 18 17 16 15 14 13 12 KS86P6408 (top view) 1 2 3 4 5 6 7 8 9 10 11 33 32 31 30 29 28 27 26 25 24 23 figure 14-2. KS86P6408 pin assignments (44-qfp package)
ks86c6404/c6408/p6408 KS86P6408 otp 14- 3 table 14-1. descriptions of pins used to read/write the eprom main chip during programming pin name pin name pin no. i/o function p2.6 sdat 9 (3) i/o serial data pin (output when reading, input when writing) input and push-pull output port can be assigned p2.7 sclk 10 (4) i/o serial clock pin (input only pin) test test 15 (9) i chip initialization and eprom cell writing power supply pin (indicates otp mode entering) when writing 12.5 v is applied and when reading. reset reset 18 (12) i 0 v: otp write and test mode 5 v: operating mode v dd / v ss v dd / v ss 11 (5) /12 (6) ? logic power supply pin. note: ( ) means 44 qfp pack age. table 14-2. comparison of KS86P6408 and ks86c6404/c6408 features characteristic KS86P6408 ks86c6404/c6408 program memory 8-kbyte eprom 8-kbyte mask rom operating voltage (v dd ) 4.0 v to 5.25 v 4.0 v to 5.25 v otp programming mode v dd = 5 v, v pp (reset) = 12.5 v pin configuration 42 sdip/44 qfp 42 sdip/44 qfp eprom programmability user program 1 time programmed at the factory operating mode characteristics when 12.5 v is supplied to the vpp (reset) pin of the KS86P6408, the eprom programming mode is entered. the operating mode (read, write, or read protection) is selected according to the input signals to the pins listed in table 14-3 below. table 14-3. operating mode selection criteria v dd vpp ( reset ) reg/ mem address (a15-a0) r/ w mode 5 v 5 v 0 0000h 1 eprom read 12.5 v 0 0000h 0 eprom program 12.5 v 0 0000h 1 eprom verify 12.5 v 1 0e3fh 0 eprom read protection note : "0" means low level; "1" means high level.
KS86P6408 otp ks86c6404/c6408/p 6408 14- 4 start address= first location v dd =5v, v pp =12.5v x = 0 program one 1ms pulse increment x x = 10 verify 1 byte last address v dd = v pp = 5 v compare all byte device passed increment address verify byte device failed pass fail no fail yes fail no figure 14-3. otp programming algorithm
ks86c6404/c6408/p6408 KS86P6408 otp 14- 5 table 14-4. d.c. electrical characteristics (t a = ? 40 _ c to + 85 _ c, v dd = 4.0 v to 5.25 v) parameter symbol conditions min typ max unit supply current (note) i dd1 normal mode; 6 mhz cpu clock ? 5.5 12 ma i dd2 idle mode; 6 mhz cpu clock 2.2 5 i dd3 stop mode 180 300 a note : supply current does not include current drawn through internal pull-up resistors or external output current loads.
KS86P6408 otp ks86c6404/c6408/p 6408 14- 6 notes


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